A Simple Guide to ARM vs. RISC-V vs. x86

RISC-V vs ARM vs x86 Title Image


We’ve been talking a lot about Raspberry Pi 5 here at PiCockpit, of course. The other day, I found a discussion about Raspberry Pi 5 that centered on the Pi’s ARM architecture and how that stacks up with RISC-V architecture. For years, people have talked about Raspberry Pi’s compatibility with x86. But what about a RISC-V Pi?

This is especially interesting, because Raspberry Pi is a member of RISC-V International.

As is Arduino, actually.

So there’s potentially a future for RISC-V architecture chips on Raspberry Pis. However, I wouldn’t hold my breath hoping for a x86 Raspberry Pi.

After all, in a recent discussion posted by Raspberry Pi, Gordon Hollingworth said, “People are like, ‘Well, could you do that? Can you make up an x86 Raspberry Pi?‘ It’s like, ‘Oh, God, it’d be a lot of work.’ You could, but…”

An Intel chip

So I thought it was time to go over some of the key differences and similarities between RISC-V, ARM, and x86 architectures. I’ll go over their history, their benefits and drawbacks, and what distinguishes them from one another.

At the end, you’ll get a sense of why that would be so much work to make an x86 Raspberry Pi, but why a RISC-V Raspberry Pi isn’t out of the question.


OriginRISC-V InternationalArm Ltd.Intel and AMD
Instruction SetRISC (Reduced Instruction Set Computing)RISC (Reduced Instruction Set Computing)CISC (Complex Instruction Set Computing)
Byte OrderTypically little-endian (user-configurable)Typically bi-endian (user-configurable)Little-endian
ApplicationsEmbedded systems, IoT devices, custom solutionsMobile devices, embedded systems, serversDesktops, laptops, servers, workstations
Licensing ModelOpen-source, royalty-free licensingARM licenses its designs to manufacturersIntel and AMD produce their own chips
EcosystemDeveloping ecosystem, open-source initiativesLarge ecosystem, extensive third-party supportLarge software and hardware ecosystem

So now let’s go through each of these points.


And let me first begin here with x86, as it’s the oldest of the three. The x86 architecture goes back to 1978, when Intel launched the 8086 family. The x86 architecture was CISC, which was hot at the time. Today, x86 architecture continues to be under the control of Intel, along with AMD.

The ARM architecture got its start 7 years later, when Acorn Computers Ltd. released the ARM1. Acorn Computers is no longer around today, but their ARM architecture lives on through Arm Ltd. Arm Ltd. now licenses out ARM architecture to other companies.

In comparison, RISC-V is extremely new, beginning in just 2010 at the University of California, Berkeley. In 2015, a bunch of tech companies (everyone from IBM to Google to Nvidia) came together to found the RISC-V Foundation. In 2020, due to geopolitical issues, the RISC-V Foundation moved to Switzerland and became RISC-V International.

RISC-V logo

Instruction Set

First, let me clarify the difference between RISC and CISC.

RISC processors use a small, optimized set of instructions, each taking a single clock cycle, enabling faster and more predictable execution.

In contrast, CISC processors have a larger and more diverse instruction set, often including complex instructions that may require multiple clock cycles, leading to potentially slower but more versatile performance in handling various tasks.

So, RISC-V is RISC-based, obviously. But what sets it apart is the fact that it’s open-source.

In their 2014 paper, Instruction Sets Should Be Free: The Case For RISC-V, Krste Asanović and David A. Patterson compare RISC-V to Linux. The idea is that there is a fully open-source Instruction Set Architecture. So people should be able to manipulate it, play with it, and share it.

Asanović and Patterson argue that this could drive innovation, better transparency, and lower costs.

Now I should mention, although RISC-V itself is open-source, specific implementations of RISC-V can be both open-source or proprietary.

ARM instructions are also RISC-based. However, since Arm Ltd. license out the architecture, they’re anything but open-source. As Asanović and Patterson put it: “An ARM license doesn’t even let you design an ARM core; you just get to use their designs.” Although it’s not quite that simple, that is generally the case.

Above, I said that x86 architecture is CISC-based. That’s true, but I should mention that, since the 90s, x86 processors also include SIMD (Single Instruction, Multiple Data) instructions for parallel processing tasks. This allows multicore processors to run quickly as well.

After all, the world’s fastest supercomputer – Frontier – is x86-based.

But the world’s second-fastest supercomputer – Fugaku – is ARM-based.

A lot of people argue that the distinction between RISC and CISC isn’t very important today. Because modern processors are so powerful, they say that the differences between these types of instruction sets have virtually disappeared. However, in their call for RISC-V, Asanović and Patterson argue that “[i]t’s been decades since any new CISC ISA has been successful” and so it makes more sense to go with a RISC-based architecture.

Byte Order

Endianness refers to the byte order in which multibyte data types are stored in computer memory.

In little-endian systems, the least significant byte is stored at the lowest memory address, while in big-endian systems, the most significant byte is stored at the lowest address.

Endianness is super important when you want to exchange data between processors. If you send information from a big-endian system to a little-endian system, then your data could easily become corrupted if you don’t convert it properly.

RISC-V is typically little-endian. That’s something you can configure however, if you want your RISC-V to have a big-endian byte order.

ARM architecture can be either little-endian or big-endian, depending on the specific implementation. Like RISC-V, you can configure an ARM chip to be big-endian.

Raspberry Pis are, by default, little-endian. You can check this out yourself by going to your Raspberry Pi, opening up the terminal, and running:


The x86 architecture is little-endian. But unlike RISC-V and ARM architecture, you can’t change this. Being little-endian is a feature of x86 architecutre.


I want to go back to the Asanović and Patterson article for a moment. Although the article is from 2014, it makes a very important point. They assert that “[w]hile the 80×86 won the PC wars, RISC dominates the tablets and smart phones of the PostPC Era; in 2013 more than 10 [billion] ARMs were shipped, as compared to 0.3 [billion] 80x86s.”

That’s a huge discrepancy, but it also shows that the applications for an architecture help define its significance. That’s why it was such a big deal in 2020 when Apple unveiled the M1 chip for its new computers. If Apple was switching from x86 to ARM, then what does that mean for x86’s future?

Nevertheless, x86 still dominates the computer market. Desktops, laptops, and servers all continue to primarily rely on x86 architecture.

ARM, meanwhile, is typically in smartphones and tablets. And, of course, in your humble Raspberry Pi. However, it looks like ARM might start to take over the computer world as well.

smartphone on table

RISC-V is clearly hoping to eke out a share of the ARM architecture’s space, but it still remains open on what it could do in the future. Both universities and industry are investing in RISC-V and watching its development closely.

If ARM has started chipping away at x86, will RISC-V start chipping away at ARM?

Licensing Model

The most restrictive of the three is the x86. As I mentioned above, really only two companies produce x86 architecture chips – Intel and AMD. The chips aren’t customizable and the architecture is wholly proprietary.

The ARM architecture works differently, because of the licensing model. A typical ARM license doesn’t allow you to create an ARM architecture design. However, there are exceptions, because Apple’s M1 chip was predictably customized to their desires.

RISC-V architecture is open-source and royalty-free, allowing anyone to design and manufacture RISC-V processors without paying licensing fees. It’s really like the Linux of ISAs.

Interestingly, though, Intel and AMD are both members of RISC-V International. So clearly they also think that it’s valuable to contribute to RISC-V architecture.


RISC-V’s ecosystem is growing rapidly, with many companies and researchers contributing to open-source projects and developing RISC-V-based products.

Although the software ecosystem isn’t huge at the moment, it is growing. You can see its developments with the RISE project (RISE stands for RISC-V Software Ecosystem).

When it comes to ARM and x86, they both dominate in their respective markets. The ecosystems for both are well-established and vast.

This is one of the clearest drawbacks with RISC-V. It simply doesn’t have the wide adoption of the other two and competition here is fierce.

RISC and CISC in Action

In this fantastic video from The [Fill in the Blank] Programmer, you can see exactly how RISC and CISC works on the level of Assembly Code.

Here you can see the difference between RISC and CISC in detail.

On ARM and RISC-V, the Assembly Code has shorter lines, but more of them. On x86, the lines of Assembly are more complex, but there are fewer of them.

The video goes through how the GCC compiler and the Clang compiler transforms C++ code into Assembly for each of the three ISAs – ARM vs. RISC-V vs. x86_64. Check it out:


We recently published an article comparing the Orange Pi 5 Plus with Raspberry Pi 5 and Rock 5 Model B. Interestingly, while all three of these SBCs are ARM-based, Radxa actually has an x86 model called Rock Pi X.

Some people worry that a wider adoption of RISC-V will cause more fragmentation. This corresponds nicely with the comparison to Linux. How many Linux distributions are there today? However, the RISC-V community is actively working towards developing standards to minimize fragmentation and compatibility issues.

Many (including some detractors) see RISC-V as a way of pushing chip architecture into the future.

Of course, with trade wars heating up between countries, things get much trickier. Arm Ltd. is based in the UK and Intel and AMD are based in the US. It’s not surprising that countries like China and Russia turn towards RISC-V.

There are, however, people who think that RISC-V is doomed to fail. They argue that RISC-V won’t merely cause fragmentation, but rather that RISC-V already is fragmented. And therefore, it won’t get off the ground.

Update (November 6th, 2023): Arm Holdings just announced that they’ve purchased a minority stake in Raspberry Pi Ltd. It’s unclear what this means for the future. You can read more here:

What do you think? Is RISC-V the future? Let us know in the comments!


  1. tozo on November 6, 2023 at 1:13 pm

    As I mentioned above, really only three companies produce x86 architecture chips – Intel and AMD.
    That is… only two. 🙂

    • Adam on November 7, 2023 at 12:36 pm

      Quite right – thanks, tozo!

  2. Bruce Hoult on November 8, 2023 at 10:27 pm

    I think it’s a bit unfair to count RISC-V age from the date some university researchers were in a pub (or whatever) in 2010 and decided to start designing their own ISA, while the others are counted from when the first commercial chip was introduced in the market.

    The ISA went through multiple incompatible versions as ideas evolved, both at the assembly language level and in the binary encoding.

    The first RISC-V chip you could buy, SiFive’s FE310, came out in December 2016 on the HiFive1 Arduino-clone board. It’s just a microcontroller, with only the User mode instructions. Machine mode and Supervisor mode instructions and CSRs were under active development and incompatible changes until not long before the base ISA was ratified (frozen, published) in July 2019. SiFive put out a Linux SBC, HiFive Unleashed (with the FU540 SoC) in early 2018, with about 500 made, but that was experimental and they were prepared for it to be orphaned if incompatible changes were made to the ISA before ratification.

    I think the fair “RISC-V origin” date is somewhere between the publication of Privileged Architecture 1.10 in May 2017 and ratification in July 2019. For sure not 2010.

    On another topic, I note that 8086 was by far the least CISCy of the CISC chips and this is a big reason it was able to survive into the RISC era (the billions from the IBM PC and clones helped a lot too!). VAX, M68000, Z8000, NS 16032/32032 were just too complex to make fast.

    “since the 90s, x86 processors also include SIMD (Single Instruction, Multiple Data) instructions for parallel processing tasks. This allows multicore processors to run quickly as well.” Those are absolutely unrelated.

    “RISC-V architecture is open-source and royalty-free, allowing anyone to design and manufacture RISC-V processors without paying licensing fees. It’s really like the Linux of ISAs.” True, but designing your own costs far more than licensing a design from one of the dozen or so commercial RISC-V core providers (with very similar business models to Arm)

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